MSM7716 - Stand-alone 14-bit Linear Codec with PLL Circuit

General Description
The MSM7716 is a single-channel 14-bit linear PCM Codec LSI implemented in CMOS. Not only can this Codec be operated stand-alone without requiring a CPU and a master clock, but also maximum design flexibility is provided by its wide range of selectable sampling frequencies and differential analog outputs which can directly drive a ceramic type handset receiver. In addition, output levels can be adjusted easily by means of external control. The MSM7716 is optimized for use as analog front end for voice processing DSP applications, such as Bluetooth™ and digital wireless phone systems.

Block Diagram

Essential Features
• Three signal controller interface
• 14-bit ADC and DAC
• Digital signal input/output interface:
   - 14-bit serial code in 2s complement format
• Sampling frequency (fs): 4 to 16 kHz
• Transmission clock frequency: fs x 14 min., 2048 kHz max.
• Compliance with ITU-T Recommendation G. 714 at fs=8kHz
• Built-in PLL eliminates need for master clock
• Two input circuits in transmit section
• Two output circuits in receive section
• Adjustable transmit gain with external resistor
• Adjustable receive gain in 8 steps, 4 dB/step by external control
• Adjustable gain up to 32dB eliminates need for microphone-amplifier
• Analog outputs can drive 1kW load; amplitude 4.0Vpp max with push-pull driving.
• Built-in reference voltage supply
• Single power supply : +2.7 to +3.6 V
• Active current: 17mA max.
• Power-save current: 11mA max.
• Power-down current: 50A max.
• Operating temperature -30 to +85C
• Package options:
   - 32-pin plastic TSOP (TSOP(1)32-P-814-0.50-1K)
   - 30-pin plastic SSOP (SSOP30-P-56-0.65-K)

Typical Application Diagram

More Audio Codecs from Oki:
Please also inquire about:
MSM7732-01 (48-TQFP/LGA/BGA, 3V, 1-ch, -Law/A-Law, 14-bit linear, 2s complement, DTMF generator,
   earphone output) - Highlight Page
ML7041 (48-TQFP, 3V, 1-ch, -Law/A-Law, 14-bit linear, earphone output) - Highlight Page
MSM7728 (30-SSOP, 3V, 1-ch, 14-bit linear (2s complement)
Line-up Table


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